1. Field of the Invention
The present invention relates to a low noise amplifier, and more particularly, to a single-ended input to differential-ended output low noise amplifier implemented with cascode and cascade topology.
2. Description of the Prior Art
A low noise amplifier is part of a receiver in a communication system and providing functions of amplifying received signals and suppressing noise figure of the receiver while designing a receiver of a general communication system. A conventional low noise amplifier is implemented with a single-ended input to single-ended output structure. However, a mixer connected to the conventional low noise amplifier has to be a single-ended input mixer because of the single-ended input to single-ended output structure so that common mode noises of the mixer and signals transmitted from a local oscillator and downconverted by the mixer to intermediated frequency (so called LO to IF feedthrough) cannot be efficiently reduced.
While designing a differential-ended output low noise amplifier, a differential-ended input to differential-ended output low noise amplifier would be conventional. However, a balun (balanced-to-unbalanced) has to be added in a previous stage of the differential-ended input to differential-ended output low noise amplifier so that a single-ended input signal received at the balun is transformed into a differential-ended output signal. The balun not only increases cost of implementing a low noise amplifier but also increases the noise figure of a corresponding receiver since the increase of the noise figure is generated from loss of the balun.
Please refer to FIG. 1, which is a diagram of a prior art low noise amplifier 100 having a single-ended input to differential-ended output structure, the low noise amplifier 100 implemented with a passive transformer. As shown in FIG. 1, the low noise amplifier 100 comprises a balun 102, a first transistor 110, a dc (direct current) current source 112, a second transistor 114, a first output matching impedance 116, a second output matching impedance 118, a first output 120, and a second output 122. The balun 102 comprises a first coil 104, a second coil 106, and an input 108. The gate of the first transistor 110 is coupled to a first terminal of the second coil 106. The dc current source 112 is coupled to the source of the first transistor 110. The gate of the second transistor 114 is coupled to a second terminal of the second coil 106. The source of the second transistor 114 is coupled to the dc current source 112. The first output matching impedance 116 is coupled to the drain of the first transistor 110. The second output matching impedance 118 is coupled to the drain of the second transistor 114. The first output 120 is coupled to the drain of the first transistor 110. The second output 122 is coupled to the drain of the second transistor 114. The differential-ended output structure of the low noise amplifier 100 is formed by both the first output 120 and the second output 122. The first coil 104 and the second coil 106 of the balun 102 are formed from wires of a corresponding integrated circuit. A signal having a phase difference equivalent to 180 degrees is generated from both the first coil 104 and the second coil 106 and transmitted to both the first transistor 110 and the second transistor 114. Then both the first transistor 110 and the second transistor 114 amplify the signal for generating a high frequency signal.
Please refer to FIG. 2, which is a diagram of a prior art low noise amplifier 200, and one of the differential transistors of the low noise amplifier 200 is grounded. As shown in FIG. 2, the low noise amplifier 200 comprises a first input matching impedance 202, an input 208, a first transistor 210, a dc current source 212, a second transistor 214, a second input matching impedance 204, a first output matching impedance 216, a second output matching impedance 218, a first output 220, and a second output 222. The output 208 is coupled to a first terminal of the first input matching impedance 202. The gate of the first transistor 210 is coupled to a second terminal of the first input matching impedance 202. The dc current source 212 is coupled to the source of the first transistor 210. The source of the second transistor 214 is coupled to the dc current source 212. The second input matching impedance 204 is coupled to the gate of the second transistor 214. The first output matching impedance 216 is coupled to the drain of the first transistor 210. The second output matching impedance 218 is coupled to the drain of the second transistor 214. The first output 220 is coupled to the drain of the first transistor 210. The second output 222 is coupled to the drain of the second transistor 214. The differential-ended output structure of the low noise amplifier 200 is formed by both the first output 220 and the second output 222. As shown in FIG. 2, one of the differential transistors of the low noise amplifier 200 is grounded, thereby, compared to the low noise amplifier 100 shown in FIG. 1, the low noise amplifier 200 saves the space of the balun 102 shown in FIG. 1 and decreases the loss generated from the balun 102. However, under high frequency, parasitic effects of elements are obvious. Therefore, the operations of the first transistor 210 and the second transistor 214 reveal a poor symmetry.
The primary component of both the low noise amplifiers 100 and 200 is the differential transistors. Therefore, under the same voltage supply, current of the dc current source 112 equals to the sum of the currents of the first transistor 110 and the second transistor 114, and current of the dc current source 212 equals to the sum of the currents of the first transistor 210 and the second transistor 214.
Please refer to FIG. 3, which is a diagram of a prior art low noise amplifier 300 having a single-ended input to differential-ended output structure. The low noise amplifier 300 comprises a first transistor 302, a first inductor 304, a second transistor 306, a second inductor 308, a first capacitor 310, a third transistor 312, a fourth transistor 314, a second capacitor 316, a first inductive impedance 318, a second inductive impedance 320, a third capacitor 322, a fourth capacitor 324, an input 326, a bias input 328, a first output 330, and a second output 332. The first inductor 304 has a first terminal coupled to the emitter of the first transistor 302 and a second terminal coupled to ground. The second inductor 308 has a first terminal coupled to the emitter of the second transistor 306 and a second terminal coupled to ground. The first capacitor 310 has a first terminal coupled to the collector of the first transistor 302 and a second terminal coupled to the base of the second transistor 306. The emitter of the third transistor 312 is coupled to the collector of the first transistor 302. The emitter of the fourth transistor 314 is coupled to the collector of the second transistor 306. The second capacitor 316 has a first terminal coupled to the base of the third transistor 312 and the base of the fourth transistor 314, and has a second terminal coupled to ground. The first inductive impedance 318 has a first terminal coupled to the collector of the third transistor 312 and a second terminal coupled to the dc voltage source VDD. The second inductive impedance 320 has a first terminal coupled to the collector of the fourth transistor 314 and a second terminal coupled to the dc voltage source VDD. The third capacitor 322 has a first terminal coupled to the collector of the third transistor 312. The fourth capacitor 324 has a first terminal coupled to the collector of the fourth transistor 314. The input 326 is coupled to the base of the first transistor 302. The bias input 328 is coupled to the base of the third transistor 312 and the base of the fourth transistor 314. The first output 330 is coupled to the second terminal of the third capacitor 322. The second output 332 is coupled to a second terminal of the fourth capacitor 324. As shown in FIG. 3, an input signal is inputted from the input 326 and to the base of the first transistor 302. After being amplified by the first transistor 302, the amplified input signal splits into two routes at the node “A” shown in FIG. 3. One route passes through the second transistor 306 and the fourth transistor 314 to the second output 332. Since the second transistor 306 forms a common-emitter configuration, thereby, a phase difference of 180 degrees is generated between the input signal and the output signal of the second transistor 306. Another route passes through the third transistor 312 to the first output 330. Since the third transistor 312 forms a common-base configuration, thereby, the phase between the input signal and the output signal of the third transistor 312 is the same. It is concluded that the phase difference between the output signal at the first output 330 and the output signal at the second output 332 is 180 degrees.